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pinctrl: starfive: use dynamic GPIO base allocation

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The JH7110 pinctrl driver currently sets a static GPIO base number from
platform data:

  sfp->gc.base = info->gc_base;

Static base assignment is deprecated and results in the following warning:

  gpio gpiochip0: Static allocation of GPIO base is deprecated,
  use dynamic allocation.

Set `sfp->gc.base = -1` to let the GPIO core dynamically allocate
the base number. This removes the warning and aligns the driver
with current GPIO guidelines.

Since the GPIO base is now allocated dynamically, remove `gc_base` field in
`struct jh7110_pinctrl_soc_info` and the associated `JH7110_SYS_GC_BASE`
and `JH7110_AON_GC_BASE` constants as they are no longer used anywhere
in the driver.

Tested on VisionFive 2 (JH7110 SoC).

Signed-off-by: Ali Tariq <alitariq45892@gmail.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Ali Tariq
2025-10-26 11:42:40 +00:00
committed by Linus Walleij
parent 61d1bb5354
commit 9dc966799a
4 changed files with 1 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/pinctrl/starfive/pinctrl-starfive-jh7110-aon.c
View File

@@ -29,7 +29,6 @@
#include "pinctrl-starfive-jh7110.h"
#define JH7110_AON_NGPIO 4
#define JH7110_AON_GC_BASE 64
#define JH7110_AON_REGS_NUM 37
@@ -138,7 +137,6 @@ static const struct jh7110_pinctrl_soc_info jh7110_aon_pinctrl_info = {
.pins = jh7110_aon_pins,
.npins = ARRAY_SIZE(jh7110_aon_pins),
.ngpios = JH7110_AON_NGPIO,
.gc_base = JH7110_AON_GC_BASE,
.dout_reg_base = JH7110_AON_DOUT,
.dout_mask = GENMASK(3, 0),
.doen_reg_base = JH7110_AON_DOEN,

2
drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c
View File

@@ -29,7 +29,6 @@
#include "pinctrl-starfive-jh7110.h"
#define JH7110_SYS_NGPIO 64
#define JH7110_SYS_GC_BASE 0
#define JH7110_SYS_REGS_NUM 174
@@ -410,7 +409,6 @@ static const struct jh7110_pinctrl_soc_info jh7110_sys_pinctrl_info = {
.pins = jh7110_sys_pins,
.npins = ARRAY_SIZE(jh7110_sys_pins),
.ngpios = JH7110_SYS_NGPIO,
.gc_base = JH7110_SYS_GC_BASE,
.dout_reg_base = JH7110_SYS_DOUT,
.dout_mask = GENMASK(6, 0),
.doen_reg_base = JH7110_SYS_DOEN,

2
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
View File

@@ -938,7 +938,7 @@ int jh7110_pinctrl_probe(struct platform_device *pdev)
sfp->gc.set = jh7110_gpio_set;
sfp->gc.set_config = jh7110_gpio_set_config;
sfp->gc.add_pin_ranges = jh7110_gpio_add_pin_ranges;
sfp->gc.base = info->gc_base;
sfp->gc.base = -1;
sfp->gc.ngpio = info->ngpios;
jh7110_irq_chip.name = sfp->gc.label;

1
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.h
View File

@@ -38,7 +38,6 @@ struct jh7110_pinctrl_soc_info {
const struct pinctrl_pin_desc *pins;
unsigned int npins;
unsigned int ngpios;
unsigned int gc_base;
/* gpio dout/doen/din/gpioinput register */
unsigned int dout_reg_base;