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spi-rockchip: Fix register out of bounds access
Do not write native chip select stuff for GPIO chip selects. GPIOs can be numbered much higher than native CS. Also, it makes no sense. Signed-off-by: Luis de Arquer <luis.dearquer@inertim.com> Link: https://patch.msgid.link/365ccddfba110549202b3520f4401a6a936e82a8.camel@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
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committed by
Mark Brown
parent
ee2ecf2cf5
commit
7a874e8b54
@@ -547,7 +547,7 @@ static int rockchip_spi_config(struct rockchip_spi *rs,
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cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;
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if (spi->mode & SPI_LSB_FIRST)
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cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET;
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if (spi->mode & SPI_CS_HIGH)
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if ((spi->mode & SPI_CS_HIGH) && !(spi_get_csgpiod(spi, 0)))
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cr0 |= BIT(spi_get_chipselect(spi, 0)) << CR0_SOI_OFFSET;
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if (xfer->rx_buf && xfer->tx_buf)
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