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tty: serial: ip22zilog: Use platform device for probing
After commit 84a9582fd2 ("serial: core: Start managing serial controllers
to enable runtime PM") serial drivers need to provide a device in
struct uart_port.dev otherwise an oops happens. To fix this issue
for ip22zilog driver switch driver to a platform driver and setup
the serial device in sgi-ip22 code.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Link: https://lore.kernel.org/r/20250725134018.136113-1-tsbogend@alpha.franken.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Thomas Bogendoerfer
committed by
Greg Kroah-Hartman
Greg Kroah-Hartman
parent
96c08ff80b
commit
3fc36ae6ab
@@ -221,3 +221,35 @@ static int __init sgi_ds1286_devinit(void)
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}
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device_initcall(sgi_ds1286_devinit);
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#define SGI_ZILOG_BASE (HPC3_CHIP0_BASE + \
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offsetof(struct hpc3_regs, pbus_extregs[6]) + \
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offsetof(struct sgioc_regs, uart))
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static struct resource sgi_zilog_resources[] = {
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{
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.start = SGI_ZILOG_BASE,
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.end = SGI_ZILOG_BASE + 15,
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.flags = IORESOURCE_MEM
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},
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{
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.start = SGI_SERIAL_IRQ,
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.end = SGI_SERIAL_IRQ,
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.flags = IORESOURCE_IRQ
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}
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};
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static struct platform_device zilog_device = {
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.name = "ip22zilog",
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.id = 0,
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.num_resources = ARRAY_SIZE(sgi_zilog_resources),
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.resource = sgi_zilog_resources,
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};
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static int __init sgi_zilog_devinit(void)
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{
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return platform_device_register(&zilog_device);
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}
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device_initcall(sgi_zilog_devinit);
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@@ -30,6 +30,7 @@
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#include <linux/console.h>
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#include <linux/spinlock.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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@@ -50,8 +51,9 @@
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#define ZSDELAY_LONG() udelay(20)
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#define ZS_WSYNC(channel) do { } while (0)
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#define NUM_IP22ZILOG 1
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#define NUM_CHANNELS (NUM_IP22ZILOG * 2)
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#define NUM_CHANNELS 2
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#define CHANNEL_B 0
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#define CHANNEL_A 1
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#define ZS_CLOCK 3672000 /* Zilog input clock rate. */
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#define ZS_CLOCK_DIVISOR 16 /* Divisor this driver uses. */
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@@ -62,9 +64,6 @@
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struct uart_ip22zilog_port {
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struct uart_port port;
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/* IRQ servicing chain. */
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struct uart_ip22zilog_port *next;
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/* Current values of Zilog write registers. */
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unsigned char curregs[NUM_ZSREGS];
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@@ -72,7 +71,6 @@ struct uart_ip22zilog_port {
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#define IP22ZILOG_FLAG_IS_CONS 0x00000004
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#define IP22ZILOG_FLAG_IS_KGDB 0x00000008
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#define IP22ZILOG_FLAG_MODEM_STATUS 0x00000010
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#define IP22ZILOG_FLAG_IS_CHANNEL_A 0x00000020
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#define IP22ZILOG_FLAG_REGS_HELD 0x00000040
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#define IP22ZILOG_FLAG_TX_STOPPED 0x00000080
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#define IP22ZILOG_FLAG_TX_ACTIVE 0x00000100
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@@ -84,6 +82,8 @@ struct uart_ip22zilog_port {
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unsigned char prev_status;
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};
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static struct uart_ip22zilog_port ip22zilog_port_table[NUM_CHANNELS];
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#define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel *)((PORT)->membase))
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#define UART_ZILOG(PORT) ((struct uart_ip22zilog_port *)(PORT))
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#define IP22ZILOG_GET_CURR_REG(PORT, REGNUM) \
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@@ -93,7 +93,6 @@ struct uart_ip22zilog_port {
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#define ZS_IS_CONS(UP) ((UP)->flags & IP22ZILOG_FLAG_IS_CONS)
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#define ZS_IS_KGDB(UP) ((UP)->flags & IP22ZILOG_FLAG_IS_KGDB)
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#define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & IP22ZILOG_FLAG_MODEM_STATUS)
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#define ZS_IS_CHANNEL_A(UP) ((UP)->flags & IP22ZILOG_FLAG_IS_CHANNEL_A)
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#define ZS_REGS_HELD(UP) ((UP)->flags & IP22ZILOG_FLAG_REGS_HELD)
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#define ZS_TX_STOPPED(UP) ((UP)->flags & IP22ZILOG_FLAG_TX_STOPPED)
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#define ZS_TX_ACTIVE(UP) ((UP)->flags & IP22ZILOG_FLAG_TX_ACTIVE)
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@@ -423,60 +422,57 @@ ack_tx_int:
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static irqreturn_t ip22zilog_interrupt(int irq, void *dev_id)
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{
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struct uart_ip22zilog_port *up = dev_id;
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struct uart_ip22zilog_port *up;
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struct zilog_channel *channel;
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unsigned char r3;
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bool push = false;
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while (up) {
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struct zilog_channel *channel
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= ZILOG_CHANNEL_FROM_PORT(&up->port);
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unsigned char r3;
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bool push = false;
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up = &ip22zilog_port_table[CHANNEL_A];
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channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
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uart_port_lock(&up->port);
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r3 = read_zsreg(channel, R3);
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uart_port_lock(&up->port);
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r3 = read_zsreg(channel, R3);
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/* Channel A */
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if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
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writeb(RES_H_IUS, &channel->control);
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ZSDELAY();
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ZS_WSYNC(channel);
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/* Channel A */
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if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
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writeb(RES_H_IUS, &channel->control);
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ZSDELAY();
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ZS_WSYNC(channel);
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if (r3 & CHARxIP)
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push = ip22zilog_receive_chars(up, channel);
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if (r3 & CHAEXT)
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ip22zilog_status_handle(up, channel);
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if (r3 & CHATxIP)
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ip22zilog_transmit_chars(up, channel);
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}
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uart_port_unlock(&up->port);
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if (push)
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tty_flip_buffer_push(&up->port.state->port);
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/* Channel B */
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up = up->next;
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channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
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push = false;
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uart_port_lock(&up->port);
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if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
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writeb(RES_H_IUS, &channel->control);
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ZSDELAY();
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ZS_WSYNC(channel);
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if (r3 & CHBRxIP)
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push = ip22zilog_receive_chars(up, channel);
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if (r3 & CHBEXT)
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ip22zilog_status_handle(up, channel);
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if (r3 & CHBTxIP)
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ip22zilog_transmit_chars(up, channel);
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}
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uart_port_unlock(&up->port);
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if (push)
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tty_flip_buffer_push(&up->port.state->port);
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up = up->next;
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if (r3 & CHARxIP)
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push = ip22zilog_receive_chars(up, channel);
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if (r3 & CHAEXT)
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ip22zilog_status_handle(up, channel);
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if (r3 & CHATxIP)
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ip22zilog_transmit_chars(up, channel);
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}
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uart_port_unlock(&up->port);
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if (push)
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tty_flip_buffer_push(&up->port.state->port);
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/* Channel B */
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up = &ip22zilog_port_table[CHANNEL_B];
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channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
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push = false;
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uart_port_lock(&up->port);
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if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
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writeb(RES_H_IUS, &channel->control);
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ZSDELAY();
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ZS_WSYNC(channel);
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if (r3 & CHBRxIP)
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push = ip22zilog_receive_chars(up, channel);
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if (r3 & CHBEXT)
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ip22zilog_status_handle(up, channel);
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if (r3 & CHBTxIP)
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ip22zilog_transmit_chars(up, channel);
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}
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uart_port_unlock(&up->port);
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if (push)
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tty_flip_buffer_push(&up->port.state->port);
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return IRQ_HANDLED;
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}
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@@ -692,16 +688,16 @@ static void __ip22zilog_reset(struct uart_ip22zilog_port *up)
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udelay(100);
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}
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if (!ZS_IS_CHANNEL_A(up)) {
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up++;
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channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
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}
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up = &ip22zilog_port_table[CHANNEL_A];
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channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
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write_zsreg(channel, R9, FHWRES);
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ZSDELAY_LONG();
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(void) read_zsreg(channel, R0);
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up->flags |= IP22ZILOG_FLAG_RESET_DONE;
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up->next->flags |= IP22ZILOG_FLAG_RESET_DONE;
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up = &ip22zilog_port_table[CHANNEL_B];
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up->flags |= IP22ZILOG_FLAG_RESET_DONE;
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}
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static void __ip22zilog_startup(struct uart_ip22zilog_port *up)
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@@ -942,47 +938,6 @@ static const struct uart_ops ip22zilog_pops = {
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.verify_port = ip22zilog_verify_port,
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};
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static struct uart_ip22zilog_port *ip22zilog_port_table;
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static struct zilog_layout **ip22zilog_chip_regs;
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static struct uart_ip22zilog_port *ip22zilog_irq_chain;
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static int zilog_irq = -1;
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static void * __init alloc_one_table(unsigned long size)
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{
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return kzalloc(size, GFP_KERNEL);
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}
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static void __init ip22zilog_alloc_tables(void)
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{
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ip22zilog_port_table = (struct uart_ip22zilog_port *)
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alloc_one_table(NUM_CHANNELS * sizeof(struct uart_ip22zilog_port));
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ip22zilog_chip_regs = (struct zilog_layout **)
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alloc_one_table(NUM_IP22ZILOG * sizeof(struct zilog_layout *));
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if (ip22zilog_port_table == NULL || ip22zilog_chip_regs == NULL) {
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panic("IP22-Zilog: Cannot allocate IP22-Zilog tables.");
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}
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}
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/* Get the address of the registers for IP22-Zilog instance CHIP. */
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static struct zilog_layout * __init get_zs(int chip)
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{
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unsigned long base;
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if (chip < 0 || chip >= NUM_IP22ZILOG) {
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panic("IP22-Zilog: Illegal chip number %d in get_zs.", chip);
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}
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/* Not probe-able, hard code it. */
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base = (unsigned long) &sgioc->uart;
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zilog_irq = SGI_SERIAL_IRQ;
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request_mem_region(base, 8, "IP22-Zilog");
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return (struct zilog_layout *) base;
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}
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#define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */
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#ifdef CONFIG_SERIAL_IP22_ZILOG_CONSOLE
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@@ -1070,144 +1025,123 @@ static struct uart_driver ip22zilog_reg = {
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#endif
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};
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static void __init ip22zilog_prepare(void)
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static void __init ip22zilog_prepare(struct uart_ip22zilog_port *up)
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{
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unsigned char sysrq_on = IS_ENABLED(CONFIG_SERIAL_IP22_ZILOG_CONSOLE);
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struct uart_ip22zilog_port *up;
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struct zilog_layout *rp;
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int channel, chip;
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int brg;
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/*
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* Temporary fix.
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*/
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for (channel = 0; channel < NUM_CHANNELS; channel++)
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spin_lock_init(&ip22zilog_port_table[channel].port.lock);
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spin_lock_init(&up->port.lock);
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ip22zilog_irq_chain = &ip22zilog_port_table[NUM_CHANNELS - 1];
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up = &ip22zilog_port_table[0];
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for (channel = NUM_CHANNELS - 1 ; channel > 0; channel--)
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up[channel].next = &up[channel - 1];
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up[channel].next = NULL;
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up->port.iotype = UPIO_MEM;
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up->port.uartclk = ZS_CLOCK;
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up->port.fifosize = 1;
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up->port.has_sysrq = sysrq_on;
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up->port.ops = &ip22zilog_pops;
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up->port.type = PORT_IP22ZILOG;
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for (chip = 0; chip < NUM_IP22ZILOG; chip++) {
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if (!ip22zilog_chip_regs[chip]) {
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ip22zilog_chip_regs[chip] = rp = get_zs(chip);
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up[(chip * 2) + 0].port.membase = (char *) &rp->channelB;
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up[(chip * 2) + 1].port.membase = (char *) &rp->channelA;
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/* In theory mapbase is the physical address ... */
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up[(chip * 2) + 0].port.mapbase =
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(unsigned long) ioremap((unsigned long) &rp->channelB, 8);
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up[(chip * 2) + 1].port.mapbase =
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(unsigned long) ioremap((unsigned long) &rp->channelA, 8);
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}
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/* Channel A */
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up[(chip * 2) + 0].port.iotype = UPIO_MEM;
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up[(chip * 2) + 0].port.irq = zilog_irq;
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up[(chip * 2) + 0].port.uartclk = ZS_CLOCK;
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up[(chip * 2) + 0].port.fifosize = 1;
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up[(chip * 2) + 0].port.has_sysrq = sysrq_on;
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up[(chip * 2) + 0].port.ops = &ip22zilog_pops;
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up[(chip * 2) + 0].port.type = PORT_IP22ZILOG;
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up[(chip * 2) + 0].port.flags = 0;
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up[(chip * 2) + 0].port.line = (chip * 2) + 0;
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up[(chip * 2) + 0].flags = 0;
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/* Channel B */
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up[(chip * 2) + 1].port.iotype = UPIO_MEM;
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up[(chip * 2) + 1].port.irq = zilog_irq;
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up[(chip * 2) + 1].port.uartclk = ZS_CLOCK;
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up[(chip * 2) + 1].port.fifosize = 1;
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up[(chip * 2) + 1].port.has_sysrq = sysrq_on;
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up[(chip * 2) + 1].port.ops = &ip22zilog_pops;
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up[(chip * 2) + 1].port.type = PORT_IP22ZILOG;
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up[(chip * 2) + 1].port.line = (chip * 2) + 1;
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up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A;
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}
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for (channel = 0; channel < NUM_CHANNELS; channel++) {
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struct uart_ip22zilog_port *up = &ip22zilog_port_table[channel];
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int brg;
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/* Normal serial TTY. */
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up->parity_mask = 0xff;
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up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
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up->curregs[R4] = PAR_EVEN | X16CLK | SB1;
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up->curregs[R3] = RxENAB | Rx8;
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up->curregs[R5] = TxENAB | Tx8;
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up->curregs[R9] = NV | MIE;
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up->curregs[R10] = NRZ;
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up->curregs[R11] = TCBR | RCBR;
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brg = BPS_TO_BRG(9600, ZS_CLOCK / ZS_CLOCK_DIVISOR);
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up->curregs[R12] = (brg & 0xff);
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up->curregs[R13] = (brg >> 8) & 0xff;
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up->curregs[R14] = BRENAB;
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}
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/* Normal serial TTY. */
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up->parity_mask = 0xff;
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up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
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up->curregs[R4] = PAR_EVEN | X16CLK | SB1;
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up->curregs[R3] = RxENAB | Rx8;
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up->curregs[R5] = TxENAB | Tx8;
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up->curregs[R9] = NV | MIE;
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up->curregs[R10] = NRZ;
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up->curregs[R11] = TCBR | RCBR;
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brg = BPS_TO_BRG(9600, ZS_CLOCK / ZS_CLOCK_DIVISOR);
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up->curregs[R12] = (brg & 0xff);
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up->curregs[R13] = (brg >> 8) & 0xff;
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up->curregs[R14] = BRENAB;
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}
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static int __init ip22zilog_ports_init(void)
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static int ip22zilog_probe(struct platform_device *pdev)
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{
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int ret;
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struct uart_ip22zilog_port *up;
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char __iomem *membase;
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struct resource *res;
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int irq;
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int i;
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printk(KERN_INFO "Serial: IP22 Zilog driver (%d chips).\n", NUM_IP22ZILOG);
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up = &ip22zilog_port_table[CHANNEL_B];
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if (up->port.dev)
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return -ENOSPC;
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ip22zilog_prepare();
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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if (request_irq(zilog_irq, ip22zilog_interrupt, 0,
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"IP22-Zilog", ip22zilog_irq_chain)) {
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membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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if (IS_ERR(membase))
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return PTR_ERR(membase);
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ip22zilog_prepare(up);
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up->port.mapbase = res->start + offsetof(struct zilog_layout, channelB);
|
||||
up->port.membase = membase + offsetof(struct zilog_layout, channelB);
|
||||
up->port.line = 0;
|
||||
up->port.dev = &pdev->dev;
|
||||
up->port.irq = irq;
|
||||
|
||||
up = &ip22zilog_port_table[CHANNEL_A];
|
||||
ip22zilog_prepare(up);
|
||||
|
||||
up->port.mapbase = res->start + offsetof(struct zilog_layout, channelA);
|
||||
up->port.membase = membase + offsetof(struct zilog_layout, channelA);
|
||||
up->port.line = 1;
|
||||
up->port.dev = &pdev->dev;
|
||||
up->port.irq = irq;
|
||||
|
||||
if (request_irq(irq, ip22zilog_interrupt, 0,
|
||||
"IP22-Zilog", NULL)) {
|
||||
panic("IP22-Zilog: Unable to register zs interrupt handler.\n");
|
||||
}
|
||||
|
||||
ret = uart_register_driver(&ip22zilog_reg);
|
||||
if (ret == 0) {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < NUM_CHANNELS; i++) {
|
||||
struct uart_ip22zilog_port *up = &ip22zilog_port_table[i];
|
||||
|
||||
uart_add_one_port(&ip22zilog_reg, &up->port);
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __init ip22zilog_init(void)
|
||||
{
|
||||
/* IP22 Zilog setup is hard coded, no probing to do. */
|
||||
ip22zilog_alloc_tables();
|
||||
ip22zilog_ports_init();
|
||||
for (i = 0; i < NUM_CHANNELS; i++)
|
||||
uart_add_one_port(&ip22zilog_reg,
|
||||
&ip22zilog_port_table[i].port);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit ip22zilog_exit(void)
|
||||
static void ip22zilog_remove(struct platform_device *pdev)
|
||||
{
|
||||
int i;
|
||||
struct uart_ip22zilog_port *up;
|
||||
|
||||
for (i = 0; i < NUM_CHANNELS; i++) {
|
||||
up = &ip22zilog_port_table[i];
|
||||
|
||||
uart_remove_one_port(&ip22zilog_reg, &up->port);
|
||||
uart_remove_one_port(&ip22zilog_reg,
|
||||
&ip22zilog_port_table[i].port);
|
||||
ip22zilog_port_table[i].port.dev = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/* Free IO mem */
|
||||
up = &ip22zilog_port_table[0];
|
||||
for (i = 0; i < NUM_IP22ZILOG; i++) {
|
||||
if (up[(i * 2) + 0].port.mapbase) {
|
||||
iounmap((void*)up[(i * 2) + 0].port.mapbase);
|
||||
up[(i * 2) + 0].port.mapbase = 0;
|
||||
}
|
||||
if (up[(i * 2) + 1].port.mapbase) {
|
||||
iounmap((void*)up[(i * 2) + 1].port.mapbase);
|
||||
up[(i * 2) + 1].port.mapbase = 0;
|
||||
}
|
||||
static struct platform_driver ip22zilog_driver = {
|
||||
.probe = ip22zilog_probe,
|
||||
.remove = ip22zilog_remove,
|
||||
.driver = {
|
||||
.name = "ip22zilog"
|
||||
}
|
||||
};
|
||||
|
||||
static int __init ip22zilog_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = uart_register_driver(&ip22zilog_reg);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = platform_driver_register(&ip22zilog_driver);
|
||||
if (ret)
|
||||
uart_unregister_driver(&ip22zilog_reg);
|
||||
|
||||
return ret;
|
||||
|
||||
}
|
||||
|
||||
static void __exit ip22zilog_exit(void)
|
||||
{
|
||||
uart_unregister_driver(&ip22zilog_reg);
|
||||
platform_driver_unregister(&ip22zilog_driver);
|
||||
}
|
||||
|
||||
module_init(ip22zilog_init);
|
||||
|
||||
Reference in New Issue
Block a user