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riscv: Add stimecmp save and restore

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If the HW support the SSTC extension, we should save and restore the
stimecmp register while cpu non retention suspend.

Signed-off-by: Nick Hu <nick.hu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250219114135.27764-2-nick.hu@sifive.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
This commit is contained in:
Nick Hu
2025-02-19 19:41:34 +08:00
committed by Alexandre Ghiti
parent 6586788f0a
commit ffef54ad41
2 changed files with 18 additions and 0 deletions
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4
arch/riscv/include/asm/suspend.h
View File

@@ -18,6 +18,10 @@ struct suspend_context {
unsigned long ie;
#ifdef CONFIG_MMU
unsigned long satp;
unsigned long stimecmp;
#if __riscv_xlen < 64
unsigned long stimecmph;
#endif
#endif
};

14
arch/riscv/kernel/suspend.c
View File

@@ -30,6 +30,13 @@ void suspend_save_csrs(struct suspend_context *context)
*/
#ifdef CONFIG_MMU
if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) {
context->stimecmp = csr_read(CSR_STIMECMP);
#if __riscv_xlen < 64
context->stimecmph = csr_read(CSR_STIMECMPH);
#endif
}
context->satp = csr_read(CSR_SATP);
#endif
}
@@ -43,6 +50,13 @@ void suspend_restore_csrs(struct suspend_context *context)
csr_write(CSR_IE, context->ie);
#ifdef CONFIG_MMU
if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) {
csr_write(CSR_STIMECMP, context->stimecmp);
#if __riscv_xlen < 64
csr_write(CSR_STIMECMPH, context->stimecmph);
#endif
}
csr_write(CSR_SATP, context->satp);
#endif
}